1. Technical Field
Exemplary embodiments relate to a phase-locked loop (PLL), and more particularly, to a PLL having a bias generator.
2. Discussion of Related Art
A PLL is a circuit that detects a phase difference between an input clock signal and an output clock signal output by a voltage controlled oscillator (VCO) and determines the frequency and phase of the output clock signal. The PLL is widely used to synchronize the frequency of the input clock signal with that of the output clock signal.